For the past few months, and really accelerating in the last couple of weeks, Dad and I have been working on a new piece, set to debut at the Coachella Valley Music and Arts Festival April 25-27. At its core will be a much improved spherical display with high-res surface complemented by volumetric accents, all in 24-bit color. On-board will be on the order of 10GB of removable flash memory, combining the increased resolution and color depth with a much greater potential show length as well as much easier program changes. All of this will lend itself toward a renewed focus on content, which is a very exciting thing for me as a big step toward the high-definition three-dimensional canvas which I originally envisioned with the ORB.
To make this a reality, I've finally crossed the void into the world of FPGA, and I'm loving it. The ability to quickly create massively parallel hardware in a few lines of code is really powerful. It takes a bit of getting used to, but within a few days I was generating the beginnings of working code in VHDL, largely with the help of Volnei A. Pedroni's Circuit Design with VHDL and the Altera Cyclone III Starter Kit. Now, just under a week into serious development, I feel as though I've got a pretty good handle on things, so the learning curve isn't as steep as it initially seemed, particularly if you've got some crossover experience developing both software and hardware.
As is unfortunately too often the case though, the learning curve seemed steeper when it came to using some of the pre-existing libraries I found. I needed SPI to access the flash memory, and so I started looking for libraries. The Altera board shipped with Quartus II which I'm using for all of my development and is a pretty nice package. Quartus leads you directly to Altera's NIOS soft-core processors with all kinds of great add on modules. These designs are cool because they allow you to set up part of the FPGA to act as a microprocessor meaning you can develop in a typical procedural language like C where appropriate, using the hardware definition languages only where necessary. The demos were easy to walk through and I thought I had everything figured out — until I read about the $2500 per seat licensing fee.
I'd heard of OpenCores and it sounded like a really cool project so I thought I'd check it out. OpenCores is essentially Sourceforge for HDL (hardware definition language) designs, albeit much less trafficked. It appears that there is some great work going on there, but at my level of knowledge, the documentation was just insufficient for my needs. If I really needed a fully-featured CPU running on my chip I'm sure I could have figured it out given enough time, but as it stands it's far from plug and play. And as the countdown timer on coachella.com continually reminds me, the show starts in 45 days, 17 hours, 28 minutes and 26 seconds. So it's time for action.
As it turned out, I spent a bit more time tweaking the SPI module I had been writing prior to looking at the soft cores, and with just a bit more effort, got it up and running. I then began work on a state machine that controls the SPI module and passes the data out to a set of PWM modules which actually control the LEDs. I'm still working on scaling the code and getting some of the finer control functionality implemented, but all indications are that with a few more days of work the code will be 99% complete. Then its on to PCB design, construction, and content.
In parallel with the electronics, Dad's hard at work building two chassis, one to ship to Manhattan for me to use as a framework to finish the electronic development and another to finish out in time for Coachella. We've got a totally new look this time, a bit more design-influenced and incorporating some cool high-tech materials. I'll get some photos of that part of the process up here as soon as they become available.
In the meantime, it's back to work.